An intelligent function unit that is a type of unit included in a programmable logic controller combines general circuit blocks such as a clock, a counter, a comparator, a selector, and a logic gate to implement various functions required for input/output control such as a pulse count, a frequency measurement, a timer, and pulse width modulation output.
The intelligent function unit requires a debug function to verify whether the functions implemented by the combination of the general circuit blocks have an error.
Patent Literature 1 discloses a technique of comparing, in a reconfigurable circuit, a signal pattern regarded as a simulated user signal with sequentially output snapshots of logic elements to monitor the internal state of the logic elements.
Patent Literature 2 discloses a technique of changing the system clock and the address of a shift register in the reconfigurable logic cell array to acquire output of a given logic cell at a given point in time.